View 74LVC1G125GF_4169231.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

74LVC1G125
Bus buffer/line driver; 3-state
Rev. 07 -- 30 August 2007 Product data sheet
1. General description
The 74LVC1G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH-level at pin OE causes the output to assume a high-impedance OFF-state. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
2. Features
I I I I I I I I I I Wide supply voltage range from 1.65 V to 5.5 V High noise immunity 24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 C ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V I Complies with JEDEC standard: N JESD8-7 (1.65 V to 1.95 V) N JESD8-5 (2.3 V to 2.7 V) N JESD8-B/JESD36 (2.7 V to 3.6 V)
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
3. Ordering information
Table 1. Ordering information Package Temperature range Name 74LVC1G125GW 74LVC1G125GV 74LVC1G125GM 74LVC1G125GF -40 C to +125 C -40 C to +125 C -40 C to +125 C -40 C to +125 C TSSOP5 SC-74A XSON6 XSON6 Description plastic thin shrink small outline package; 5 leads; body width 1.25 mm plastic surface-mounted package; 5 leads plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm Version SOT353-1 SOT753 SOT886 SOT891 Type number
4. Marking
Table 2. Marking Marking code VM V25 VM VM Type number 74LVC1G125GW 74LVC1G125GV 74LVC1G125GM 74LVC1G125GF
5. Functional diagram
2
A
Y
4 2 4
A
Y
1
OE
mna118
1
EN
mna119
OE
mna120
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram
74LVC1G125_7
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
2 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
6. Pinning information
6.1 Pinning
74LVC1G125 74LVC1G125
OE A 1 2 GND GND 3
001aaf198
OE 5 VCC
1
6
VCC OE A
74LVC1G125
1 2 3 6 5 4 VCC n.c. Y
A
2
5
n.c.
3
4
Y
GND
4
Y
001aaf199
001aaf400
Transparent top view
Transparent top view
Fig 4. Pin configuration SOT353-1 and SOT753
Fig 5. Pin configuration SOT886
Fig 6. Pin configuration SOT891
6.2 Pin description
Table 3. Symbol OE A GND Y n.c. VCC Pin description Pin SOT353-1/SOT753 1 2 3 4 5 SOT886/SOT891 1 2 3 4 5 6 output enable input data input ground (0 V) data output not connected supply voltage Description
7. Functional description
Table 4. Input OE L L H
[1] H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state.
Function table[1] Output A L H X Y L H Z
74LVC1G125_7
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
3 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
8. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK VI IOK VO IO ICC IGND Ptot Tstg
[1] [2] [3]
Parameter supply voltage input clamping current input voltage output clamping current output voltage output current supply current ground current total power dissipation storage temperature
Conditions VI < 0 V
[1]
Min -0.5 -50 -0.5 [1][2] [1][2]
Max +6.5 +6.5 50 VCC + 0.5 +6.5 50 100 250 +150
Unit V mA V mA V V mA mA mA mW C
VO > VCC or VO < 0 V Active mode Power-down mode VO = 0 V to VCC
-0.5 -0.5 -100
Tamb = -40 C to +125 C
[3]
-65
The input and output voltage ratings may be exceeded if the input and output current ratings are observed. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 packages: above 45 C the value of Ptot derates linearly with 2.4 mW/K.
9. Recommended operating conditions
Table 6. Symbol VCC VI VO Tamb t/V Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 1.65 V to 2.7 V VCC = 2.7 V to 5.5 V Active mode VCC = 0 V; Power-down mode Conditions Min 1.65 0 0 0 -40 Typ Max 5.5 5.5 VCC 5.5 +125 20 10 Unit V V V V C ns/V ns/V
74LVC1G125_7
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
4 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
10. Static characteristics
Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = -40 C to +85 C VIH HIGH-level input voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VIL LOW-level input voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VOL LOW-level output voltage VI = VIH or VIL VCC = 1.65 V to 5.5 V; IO = 100 A VCC = 1.65 V; IO = 4 mA VCC = 2.3 V; IO = 8 mA VCC = 2.7 V; IO = 12 mA VCC = 3.0 V; IO = 24 mA VCC = 4.5 V; IO = 32 mA VOH HIGH-level output voltage VI = VIH or VIL VCC = 1.65 V to 5.5 V; IO = -100 A VCC = 1.65 V; IO = -4 mA VCC = 2.3 V; IO = -8 mA VCC = 2.7 V; IO = -12 mA VCC = 3.0 V; IO = -24 mA VCC = 4.5 V; IO = -32 mA II IOZ IOFF ICC ICC CI input leakage current OFF-state output current VCC = 0 V to 5.5 V; VI = 5.5 V or GND VCC = 3.6 V; VI = VIH or VIL; VO = 5.5 V or GND VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A per pin; VCC = 2.3 V to 5.5 V; VI = VCC - 0.6 V; IO = 0 A VCC - 0.1 1.2 1.9 2.2 2.7 3.8 0.1 0.1 0.1 0.1 5 5 5 10 10 10 500 V V V V V V A A A A A pF 0.1 0.45 0.3 0.4 0.55 0.55 V V V V V V 0.65 x VCC 1.7 2.0 0.7 x VCC 0.7 0.8 0.3 x VCC V V V V V V V Conditions Min Typ[1] Max Unit
0.35 x VCC V
power-off leakage current VCC = 0 V; VI or VO = 5.5 V supply current additional supply current input capacitance
74LVC1G125_7
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
5 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
Table 7. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = -40 C to +125 C VIH HIGH-level input voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VIL LOW-level input voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VOL LOW-level output voltage VI = VIH or VIL VCC = 1.65 V to 5.5 V; IO = 100 A VCC = 1.65 V; IO = 4 mA VCC = 2.3 V; IO = 8 mA VCC = 2.7 V; IO = 12 mA VCC = 3.0 V; IO = 24 mA VCC = 4.5 V; IO = 32 mA VOH HIGH-level output voltage VI = VIH or VIL VCC = 1.65 V to 5.5 V; IO = -100 A VCC = 1.65 V; IO = -4 mA VCC = 2.3 V; IO = -8 mA VCC = 2.7 V; IO = -12 mA VCC = 3.0 V; IO = -24 mA VCC = 4.5 V; IO = -32 mA II IOZ IOFF ICC ICC input leakage current OFF-state output current VCC = 0 V to 5.5 V; VI = 5.5 V or GND VCC = 3.6 V; VI = VIH or VIL; VO = 5.5 V or GND VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A per pin; VCC = 2.3 V to 5.5 V; VI = VCC - 0.6 V; IO = 0 A VCC - 0.1 0.95 1.7 1.9 2.0 3.4 100 200 200 200 5000 V V V V V V A A A A A 0.1 0.70 0.45 0.60 0.80 0.80 V V V V V V 0.65 x VCC 1.7 2.0 0.7 x VCC 0.7 0.8 0.3 x VCC V V V V V V V Conditions Min Typ[1] Max Unit
0.35 x VCC V
power-off leakage current VCC = 0 V; VI or VO = 5.5 V supply current additional supply current
[1]
All typical values are measured at VCC = 3.3 V and Tamb = 25 C.
74LVC1G125_7
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
6 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
11. Dynamic characteristics
Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9. Symbol Parameter tpd Conditions
[2]
-40 C to +85 C Min Typ[1] 3.3 2.2 2.5 2.1 1.7 4.1 2.8 3.3 2.4 2.1 4.3 2.7 3.0 3.1 2.2 25 6 Max 8.0 5.5 5.5 4.5 4.0 9.4 6.6 6.6 5.3 5.0 9.2 5.0 5.0 5.0 4.2 -
-40 C to +125 C Unit Min 1.0 0.5 0.5 0.5 0.5 1.0 0.5 0.5 0.5 0.5 1.0 0.5 0.5 0.5 0.5 Max 10.5 7 7 6 5.5 12 8.5 8.5 7 6.5 12 6.5 6.5 6.5 5.5 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns pF pF
propagation delay A to Y; see Figure 7 VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V
1.0 0.5 0.5 0.5 0.5
[3]
ten
enable time
OE to Y; see Figure 8 VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V
1.0 0.5 0.5 0.5 0.5
[4]
tdis
disable time
OE to Y; see Figure 8 VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V
1.0 0.5 0.5 0.5 0.5
[5]
CPD
power dissipation capacitance
per buffer; VI = GND to VCC output enabled output disabled
-
[1] [2] [3] [4] [5]
Typical values are measured at Tamb = 25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. tpd is the same as tPLH and tPHL ten is the same as tPZH and tPZL tdis is the same as tPLZ and tPHZ CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of outputs.
74LVC1G125_7
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
7 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
12. Waveforms
VI A input GND t PHL VOH Y output VOL VM
mnb153
VM
t PLH
Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7. Input A to output Y propagation delay times
VI OE input GND tPLZ VCC output LOW-to-OFF OFF-to-LOW VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled
mna644
VM
tPZL
VM VX tPZH VY VM
Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8. 3-state enable and disable times Table 9. VCC 1.65 V to 1.95 V 2.3 V to 2.7 V 2.7 V 3.0 V to 3.6 V 4.5 V to 5.5 V Measurement points Input VM 0.5VCC 0.5VCC 1.5 V 1.5 V 0.5VCC Output VM 0.5VCC 0.5VCC 1.5 V 1.5 V 0.5VCC VX VOL + 0.15 V VOL + 0.15 V VOL + 0.3 V VOL + 0.3 V VOL + 0.3 V VY VOH - 0.15 V VOH - 0.15 V VOH - 0.3 V VOH - 0.3 V VOH - 0.3 V
Supply voltage
74LVC1G125_7
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
8 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
VEXT VCC VI VO DUT
RT CL RL RL
G
mna616
Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times.
Fig 9. Load circuitry for switching times Table 10. VCC 1.65 V to 1.95 V 2.3 V to 2.7 V 2.7 V 3.0 V to 3.6 V 4.5 V to 5.5 V Test data Input VI VCC VCC 2.7 V 2.7 V VCC tr, tf 2.0 ns 2.0 ns 2.5 ns 2.5 ns 2.5 ns Load CL 30 pF 30 pF 50 pF 50 pF 50 pF RL 1 k 500 500 500 500 VEXT tPLH, tPHL open open open open open tPZH, tPHZ GND GND GND GND GND tPZL, tPLZ 2VCC 2VCC 6V 6V 2VCC
Supply voltage
74LVC1G125_7
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
9 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
13. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1
D
E
A X
c y HE vMA
Z
5
4
A2 A1 (A3) A
1
e e1 bp
3
wM detail X
Lp L
0
1.5 scale
3 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.1 0 A2 1.0 0.8 A3 0.15 bp 0.30 0.15 c 0.25 0.08 D(1) 2.25 1.85 E(1) 1.35 1.15 e 0.65 e1 1.3 HE 2.25 2.0 L 0.425 Lp 0.46 0.21 v 0.3 w 0.1 y 0.1 Z(1) 0.60 0.15 7 0
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC MO-203 JEITA SC-88A EUROPEAN PROJECTION ISSUE DATE 00-09-01 03-02-19
Fig 10. Package outline SOT353-1 (TSSOP5)
74LVC1G125_7 (c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
10 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
Plastic surface-mounted package; 5 leads
SOT753
D
B
E
A
X
y
HE
vMA
5
4
Q
A A1 c
1
2
3
detail X
Lp
e
bp
wM B
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 0.100 0.013 bp 0.40 0.25 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT753
REFERENCES IEC JEDEC JEITA SC-74A
EUROPEAN PROJECTION
ISSUE DATE 02-04-16 06-03-16
Fig 11. Package outline SOT753
74LVC1G125_7 (c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
11 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b 1 2 3 4x L1 L
(2)
e
6 e1
5 e1
4
6x
(2)
A
A1 D
E
terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A (1) max 0.5 A1 max 0.04 b 0.25 0.17 D 1.5 1.4 E 1.05 0.95 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm
Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT886 REFERENCES IEC JEDEC MO-252 JEITA EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22
Fig 12. Package outline SOT886 (XSON6)
74LVC1G125_7 (c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
12 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
SOT891
1
2
b 3 4x
(1)
L1 e
L
6 e1
5 e1
4
6x
(1)
A
A1 D
E
terminal 1 index area 0 1 scale DIMENSIONS (mm are the original dimensions) UNIT mm A max 0.5 A1 max 0.04 b 0.20 0.12 D 1.05 0.95 E 1.05 0.95 e 0.55 e1 0.35 L 0.35 0.27 L1 0.40 0.32 2 mm
Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION SOT891 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-04-06 07-05-15
Fig 13. Package outline SOT891 (XSON6)
74LVC1G125_7 (c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
13 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
14. Abbreviations
Table 11. Acronym CMOS DUT ESD HBM MM TTL Abbreviations Description Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic
15. Revision history
Table 12. Revision history Release date 20070830 Data sheet status Product data sheet Change notice Supersedes 74LVC1G125_6 Document ID 74LVC1G125_7 Modifications:
* * * *
The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. In Section 10 "Static characteristics", changed conditions for input leakage and supply current. Figure 13 "Package outline SOT891 (XSON6)" updated. Product data sheet Product specification Product specification Product specification Product specification Product specification 74LVC1G125_5 74LVC1G125_4 74LVC1G125_3 74LVC1G125_2 74LVC1G125_1 -
74LVC1G125_6 74LVC1G125_5 74LVC1G125_4 74LVC1G125_3 74LVC1G125_2 74LVC1G125_1
20060912 20040915 20021118 20020528 20010406 20001222
74LVC1G125_7
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
14 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
16. Legal information
16.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
16.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
17. Contact information
For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com
74LVC1G125_7
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 -- 30 August 2007
15 of 16
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
18. Contents
1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information. . . . . . . . . . . . . . . . . . . . . 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 30 August 2007 Document identifier: 74LVC1G125_7

▲Up To Search▲

Price & Availability of 74LVC1G125GF

	To Download 74LVC1G125GF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .